The present invention generally relates to semiconductor devices and more particularly to a semiconductor package that has a single in-line package structure.
In order to improve the efficiency of mounting of semiconductor devices on a support substrate such as a printed circuit board, a package structure designed for surface mounting is used extensively. By using the surface mounting technology, the semiconductor device can be mounted on the circuit board without providing holes for inserting leads of the device. The soldering of the leads is achieved by merely placing the device on the circuit board and passing the device and the circuit board through a heating furnace for causing a reflow of soldering alloy. Thereby, the efficiency of the mounting process is improved significantly and the fabrication cost of electronic apparatuses that use the semiconductor devices is significantly reduced.
In order to mount as many as possible of the semiconductor devices on a single support substrate, a so-called single in-line package (SIP) is proposed. In the single in-line package, the leads are provided along a single edge of a flat package body to extend perpendicularly with respect to the edge, and the package body is held upright on the substrate by inserting the leads into the corresponding holes of the substrate. As the package body is held vertically on the substrate, one can increase the number of the packages that are mounted on the single substrate. Further, such a structure is advantageous for cooling the device.
In order to combine the advantageous features of the single in-line package with the advantageous feature of the surface mounting technology, a package structure shown in FIG. 1 is proposed in U.S. Pat. No. 4,975,763.
Referring to FIG. 1, the package designated by a numeral 1 includes a flat resin package body 2 that accommodates therein a semiconductor chip 3. At an edge 2a of the flat package body 2, there are provided a number of leads each having an inner lead part 4a connected to a bonding pad of the chip 3 and an outer lead part 4b extending outward from the edge 2a. Further, the outer lead part 4b of the leads 4 is bent laterally with respect to the extending direction of the leads 4. In order to support the package body 2 on the substrate at the time of mounting, there is provided a pair of studs 5 each including a stop portion 6 and a cylindrical clip portion 7 of a reduced diameter for inserting into a corresponding hole provided on the substrate.
FIG. 2 shows the mounting of the package 1 on a substrate 8, wherein the substrate 8 is formed with a hole 8a for holding the clip portion 7 of the stud 5. There, the portion 7 is inserted into the hole 8a as shown in FIG. 2 and the package body 2 is held upright on the substrate 8. The substrate 8 carries thereon a conductor pattern 8b for wiring, and the lead 4 is contacted with the conductor pattern 8b when the package 1 is held on the substrate 8. By passing the substrate 8 together with the package 1 in the state shown in FIG. 2 through a heating device, the soldering alloy provided on the conductor pattern 8b causes a reflow and the lead 4 is soldered firmly upon the conductor pattern 8.
In this conventional package structure, there is a problem in that one has to provide the hole 8a on the substrate 8 in correspondence to the stud 5 for holding the package body 2 on the substrate 8. As each lead 4 has to engage with a corresponding pattern 8b when the package is mounted, it is necessary that the hole 8a be formed with high precision. This requirement is particularly acute in recent semiconductor devices that have a large number of leads on the package body. Obviously, such a formation of the hole and the insertion of the stud into the hole undermine the advantageous feature of surface mounting technology, and the efficiency of mounting is decreased.
The package of FIG. 1 has another drawback in that each lead 4 has to extend straight from the package body 2 at least for a distance corresponding to the length of the stop portion 6 of each stud 5. This straight part of the lead 4 does not contribute to anything and causes an unwanted delay of the electrical signals that is carried therethrough. With the increasing operational speed of semiconductor devices, such a delay may cause a serious problem in the exchange of electric signals between the chip and the conductor pattern on the substrate. Further, such a structure having a long, exposed lead is vulnerable to external noises. As long as the studs are used for supporting the package body on the substrate, the length of the lead cannot be satisfactorily reduced.